# Tag Archives: fpga

Hands on tutorial into getting the all programmable system on chip up and running using the Xilinx Zynq family with PlanAhead.

For the MicroZed chronicles a in depth tutorial consisting of over 100 blogs see here

# How to Implement State Machines in Your FPGA Issue 81

FPGAs are often called upon to perform
sequence- and control-based actions such as
implementing a simple communication protocol.
For a designer, the best way to address
these actions and sequences is by using a state
machine. State machines are logical constructs that transition
among a finite number of states. A state machine will be in
only one state at a particular point in time. It will, however,
move between states depending upon a number of triggers.

# The Basics of FPGA Mathematics Issue 80

One of the many benefits of an FPGA-based solution
is the ability to implement a mathematical
algorithm in the best possible manner for the
problem at hand. For example, if response time
is critical, then we can pipeline the stages of mathematics.
But if accuracy of the result is more important, we can use
more bits to ensure we achieve the desired precision. Of
course, many modern FPGAs also provide the benefit of
embedded multipliers and DSP slices, which can be used to
obtain the optimal implementation in the target device.
Let’s take a look at the rules and techniques that you can
use to develop mathematical functions within an FPGA or
other programmable device.

# The Engineers Guide to using ADCs and DACs issue 80

Once it’s performed the task it
was designed to do, an FPGAbased
system next has to interface
with the real world, and as every
engineer knows, the real world tends
to function around analog as opposed
to digital signals. That means conversion
is going to be required to and from
the digital domain from the analog
realm. Just as you face a plethora of
choices in selecting the correct FPGA
for the job at hand, so too will you find
an abundance of riches when choosing
the correct ADC or DAC for a system.

# How to Use the CORDIC Algorithm in Your FPGA Design Issue 79

Invented by Jack Volder while designing a new navigation
computer at Convair for the B-58A Hustler program
in 1959, CORDIC—it stands for Coordinate Rotation
Digital Computer—is a simple algorithm designed to calculate
mathematical, trigonometric and hyperbolic mathematical
functions.

# Ins and Outs of Digital Filter Design and Implementation Issue 78

Filters are a key part of any signal-
processing system, and as
modern applications have
grown more complex, so has
filter design. FPGAs provide
the ability to design and implement filters
with performance characteristics that
would be very difficulty to re-create with
analog methods. What’s more, these digital
filters are immune to certain issues that
plague analog implementations, notably
component drift and tolerances (over temperature,
applications). These analog effects
especially in areas such as passband ripple.

# How to Build a Better Dc/Dc Regulator Using FPGA’s Issue 77

DC/DC converters using analog
components (bespoke ICs, operational
amplifiers, resistors, capacitors and
the like) to control the feedback loop
and to generate the pulse-width modulation
required for switching. When
using analog components like these,
you must consider a number of factors,
taking tolerances, electrical
stresses, aging drift and temperature
drift into account to ensure the stability
of the design. Now, the availability
of affordable low-powered FPGAs
coupled with analog-to-digital converters
allows the FPGA to replace the traditional
analog approach.

# High Performance FPGA’s Take Flight in Micro Satellites Issue 75

The UKube1 mission is the pilot mission for the U.K. Space
Agency’s planned CubeSat program. CubeSats are a class of
nanosatellites that are scalable from the basic 1U satellite
(10 x 10 x 10 cm) up to 3U (30 x 10 x 10 cm) and beyond, and which
are flown in low-earth orbit. The typical development cost of a
CubeSat payload is less than \$100,000, and development time is
short. This combination makes CubeSats an ideal platform for verifying
new and exciting technologies in orbit without the associated
overhead or risks that would be present in flying these payloads on
a larger mission. Of course, this class of satellites can present its
own series of design challenges for the engineers involved.
two experiments, both of which are FPGA based. The first experiment
is the validation of a patent held by Astrium on random-number
generation. True random-number generation is an essential component
of secure communications systems. The second experiment
is the flight of a large, high-performance Xilinx® Virtex®-4 FPGA
with the aim of achieving additional in-flight experience with this
technology while gaining an understanding of the device’s radiation
performance and capabilities in the low-earth orbit (LEO). Figure 1
shows the architecture of the payload.

# Using FPGA’s in Mission Critical Systems Issue 73

Dramatic surges in FPGA technology,
device size and capabilities have over the
last few years increased the number of
potential applications that FPGAs can
implement. Increasingly, these applications
are in areas that demand high reliability,
such as aerospace, automotive or
medical. Such applications must function
within a harsh operating environment,
which can also affect the system
performance. This demand for high reliability
coupled with use in rugged environments
often means you as the
engineer must take additional care in the
design and implementation of the state
machines (as well as all accompanying
logic) inside your FPGA to ensure they
can function within the requirements.
One of the major causes of errors within
state machines is single-event upsets
caused by either a high-energy neutron or
an alpha particle striking sensitive sections
of the device silicon. SEUs can cause a bit
to flip its state (0 -> 1 or 1 -> 0), resulting
in an error in device functionality that
could potentially lead to the loss of the system
or even endanger life if incorrectly
handled. Because these SEUs do not result
in any permanent damage to the device
itself, they are called soft errors.