AMD 12/12

ADIUVO ENGINEERING BLOG

Sep 30, 20204 min read

MicroZed Chronicles: Vivado Simulator Interface – Using C Test Benches on HDL

For complex algorithms, it is often a good idea to first create a model which defines the algorithm’s behavior.

Sep 23, 20204 min read

MicroZed Chronicles: Introduction to RTL Simulation and XSIM

No matter how captured (RTL, HLS, Model Driven), all programmable logic designs should start with agreed requirements that define the...

Sep 16, 20203 min read

MicroZed Chronicles: RTL Design Verification Techniques

So, before we look in more detail at Vivado XSIM, let’s first understand the entire verification landscape and what we are trying to achieve

Sep 9, 20203 min read

MicroZed Chronicles: UltraFast Design Methodologies

Using Xilinx UltraFast design methodologies can offer significant benefits when implementing designs.

Sep 2, 20203 min read

MicroZed Chronicles: Quality of Result

In this blog we explore the Quality of Result Assessment (QoRA) and Quality of Result Suggestions (QoRS).

Aug 26, 20204 min read

MicroZed Chronicles: Design Analysis Report

One of the most time-consuming elements of implementing an FPGA design is not often the design capture, but achieving timing performance.

Aug 5, 20204 min read

MicroZed Chronicles: MicroZed and Back Where We Started (Part Three, SW Debugging)

This is a follow-on to last week’s demonstration of developing embedded software using Vitis 2020.1. In this week’s blog, we are going to...

Jul 29, 20204 min read

MicroZed Chronicles: MicroZed and Back Where We Started (Part Two, Creating Hello World)

In the last blog, we looked at how we could start to create a MicroZed project in Vivado 2020.1 just like we did when we started the blog...

Jul 22, 20203 min read

MicroZed Chronicles: MicroZed and Back Where We Started (Part 1)

When I started this blog nearly seven years ago now, we developed the solution in Vivado 2013.2. Following that, we have gone on to examine