One of the questions I get asked a lot is which development board is the best for (beginner) FPGA and SOC development. Understandably,...

A lot of my FPGA development takes place within Visual Studio Code where I use it with TerosHDL to create HDL and cocotb for...

We often use finite state machines (FSM) when we want to implement control structures in our programmable logic structures. As complexity...

When we are verifying a design or bringing it up on a board, it’s not uncommon for either reset or clocking issues to cause it to not...

A few weeks ago, we looked at what to do if you experience issues with DDR3 when bringing up a new board. In this blog, we are going to...

Over the last few weeks, we have been working to create a simple system which allows debugging from a UART into an AXI Lite network. This...

For many applications, selecting the most appropriate device is critical. Many of our clients are often questioning which device they...

Last week we examined how we could create a UART with AXI Stream interfaces to enable access to AXI buses in device for debugging. In...

As we know, FPGA design and FPGA verification are complex businesses. Then, of course, comes integration, at which time the actual...

Last week we looked at configuring and deploying multi-gigabit GTH transceivers using the GTH wizard. One of the key things when using...

Introduction It is a common problem in FPGA design to have to send high-bandwidth data (such as video) between two different FPGAs. ...

A few months ago, we looked at GitHub Copilot. The tool uses AI to assist with the coding process and it felt a little like pair...

We looked recently at the UltraScale+ IO resources which provide a range of capabilities that can be very effective in addressing both...

One of the great features about the new Avnet ZU1CG board is the interfacing it provides. It gives us three SYZYGY interfaces along with...

One of my passions is sharing information about how we can develop better, more effective FPGA designs. This passion is the driving force...

A few months ago, we looked at the AXI Stream FIFO. The AXI Steaming FIFO allows developers to be able to access AXI Streams from AXI...

It is always exciting when new devices are introduced, and this week, AMD Xilinx announced two new devices into the already popular Artix...

It’s common for many custom FPGA board developments to contain a DDR3 memory. Of course, when we develop a custom board, we need to...

Last week we examined the Video Frame Buffer Write (VFBW), which is capable of writing image frames to an external memory. This week, we...

When I’ve previously created image processing blogs or applications, I have tended to use the Video Direct Memory Access (VDMA) module to...