Last week we examined how we could create a UART with AXI Stream interfaces to enable access to AXI buses in device for debugging. In...

As we know, FPGA design and FPGA verification are complex businesses. Then, of course, comes integration, at which time the actual...

Last week we looked at configuring and deploying multi-gigabit GTH transceivers using the GTH wizard. One of the key things when using...

Introduction It is a common problem in FPGA design to have to send high-bandwidth data (such as video) between two different FPGAs. ...

A few months ago, we looked at GitHub Copilot. The tool uses AI to assist with the coding process and it felt a little like pair...

We looked recently at the UltraScale+ IO resources which provide a range of capabilities that can be very effective in addressing both...

One of the great features about the new Avnet ZU1CG board is the interfacing it provides. It gives us three SYZYGY interfaces along with...

One of my passions is sharing information about how we can develop better, more effective FPGA designs. This passion is the driving force...

A few months ago, we looked at the AXI Stream FIFO. The AXI Steaming FIFO allows developers to be able to access AXI Streams from AXI...

It is always exciting when new devices are introduced, and this week, AMD Xilinx announced two new devices into the already popular Artix...

It’s common for many custom FPGA board developments to contain a DDR3 memory. Of course, when we develop a custom board, we need to...

Last week we examined the Video Frame Buffer Write (VFBW), which is capable of writing image frames to an external memory. This week, we...

When I’ve previously created image processing blogs or applications, I have tended to use the Video Direct Memory Access (VDMA) module to...

A few days ago, I noticed that AMD Xilinx had published a blog stating that 7 series devices would be available beyond 2035. I must admit...

On my journey exploring how Cocotb works on a range of interfaces, this week I am going to look at how we can work with AXI Lite and...

Over the last few weeks, I have been creating a course centered around the Avnet ZUBoard which will be like the MiniZed and Ultra96-V2...

A few weeks ago, we looked at the python-based cocotb framework. In that blog, we looked at a simple memory scrubber created around a XPM...

Ever since the previous overview, I’ve had the Avnet ZUBoard 1CG sitting on my desk. I also just purchased a FLIR C5 thermal imaging...

Verification of both the modules and top-level testing is often more complex and time consuming than creating the HDL. Previously, we’ve...

One of the great things about the BRAM in Xilinx FPGAs is its ability to implement error correcting codes (ECC) on the data stored...