One of the major differences with the Alveo V80 accelerator card is the implementation of the satellite controller. The satellite...

Last week, we examined the new MicroBlaze V, which is based on the popular RISC-V RV32I Instruction Set Architecture. This enabled me to...

One of the things I have been very excited about recently is the MicroBlaze RISC-V or MicroBlaze V as it will be known.  The MicroBlaze V...

Last week, we looked at how we could create a baseline timing closure, which hopefully helps with achieving timing closure. Of course,...

In our first blog and introduction to the new Alveo V80, we examined the features and capabilities of the board itself. In this blog we...

There are many factors that come together to create a successful FPGA design. Not only do we need to have a sensible architecture, IP...

One of the tasks I have been meaning to accomplish since receiving the Avnet ZU1CG board is connecting the high-speed IO interface with...

In this blog series, we have looked at several AMD Versal devices from the Prime (VMK180) and AI Core series (VK190) to the AI Edge...

Over the years, we have spent a lot of time looking at the Arty series of devices. Outside of the MicroZed, they might be some of the...

Last week we looked at our custom Kria carrier card and one of the final tests was to program the clocks using the Skyworks programmer...

In this final instalment looking at the Alveo U55C I want to explore how we can work with the Alveo U55C using Python. Using this...

One of the projects we’ve been working on recently is the development of a custom K26 carrier board. This project is interesting because...

One of the nice things about writing this blog is that I get to take a look at many new FPGA and SoC boards. A few weeks ago, I received...

So far on this journey of exploring how we can use Alveo cards outside of the traditional flow we have examined creating the reference...

Understanding the capabilities of a device extends beyond reading about its specifications; as engineers, the true grasp comes from...

As we look at how to debug our systems, one commonly used approach is to implement an ILA within the design for system observation in the...

As a follow on from last week, one of the techniques I like to use to stimulate or capture data in our FPGA designs is a Linear Feedback...

In our previous article, we introduced the Altera Agilex 5 FPGAs. In this article, we delve deeper into three key aspects of the Agilex 5...

One of the things I want to take a look at over the next few blogs is how we can use test equipment and ILAs in more advanced use cases...

One of the things I love is exploring new FPGAs and SoCs, their capabilities and of course how to work with and get the best from the...