In this blog, we often talk about detailed design features or aspects of FPGA or heterogeneous SoC design. This allows us to learn about...

Clocking is at the heart of every FPGA design.. We can spend a lot less time battling the tools if we get the clock architecture right,...

Recently I’ve shared several projects on Hackster which are based around digital filters, math and signal processing. One common element...

There is a wide range of development boards on the market today. Some are ideal for beginners who are just learning programmable logic or...

While writing the HDL is often the easy element of FPGA development, the most challenging and time-consuming element can be verification....

Along side FPGA development I am also interested in Microprocessors, especially those which can be used for edge applications. A few...

We looked at fixed point math a few weeks ago and we’ve also previously looked at how we can use DSP48 in both 7 series and UltraScale+...

You might have noticed several posts on the Avnet ZUBoard 1CG over the last six months. This board contains an AMD Xilinx ZU1CG MPSoC...

One of the processor-based solutions that I have had on my shelf to look at for a while now is the Avnet RZ Board. I bought this board...

Our programmable logic designs are often deployed in applications which can be electrically noisy. This noise can affect the signals that...

Lately we have been discussing helpful tips and tricks, the best development boards and even the best books to reference if you’re...

Over the years, we have looked at many different verification frameworks like cocotb and varying approaches when working with AMD AXI...

In addition to questions about the best beginner development boards, I am often asked which books I recommend for FPGA developers just...

One of the first articles I ever wrote was about how FPGAs perform fixed-point math. Understanding this is important because FPGA-based...

One of the questions I get asked a lot is which development board is the best for (beginner) FPGA and SOC development. Understandably,...

A lot of my FPGA development takes place within Visual Studio Code where I use it with TerosHDL to create HDL and cocotb for...

We often use finite state machines (FSM) when we want to implement control structures in our programmable logic structures. As complexity...

When we are verifying a design or bringing it up on a board, it’s not uncommon for either reset or clocking issues to cause it to not...

A few weeks ago, we looked at what to do if you experience issues with DDR3 when bringing up a new board. In this blog, we are going to...

Over the last few weeks, we have been working to create a simple system which allows debugging from a UART into an AXI Lite network. This...