One of the main challenges FPGA designers face, especially those new to FPGA design is how to achieve timing closure. While it seems...

Over the last few months we have been developing a tile, which contains a Spartan 7 XC7S25 and all of the supporting peripherals...

Recently, I've seen a lot of questions about how to prepare for interviews, especially for those looking to land their first FPGA job or...

One of the things I love about all AMD FPGA and SoC devices is the inclusion of the XADC / Sysmon ADC. This allows us to monitor not only...

Over the years, I have worked on a range of engineering projects in various roles, from being the FPGA engineer, hardware engineer to the...

Over the years, we have spent a lot of time looking at the Arty series of devices. Outside of the MicroZed, they might be some of the...

Recently, I have posted a few blogs and projects which looked at signal processing or filters. I thought it would be a good idea to go...

One of the questions people often ask me is how to get started on the journey of learning about FPGAs. Of course, everyone’s journey is...

A few weeks ago we looked at the GateMate FPGA from Cologne Chip. In this blog we are going to explore the GateMate FPGA tool chain and...

In the 2024 MicroZed Chronicles, we are going to examine Versal in depth with a particular focus on the AI Edge series. We’ve looked at...

Developing FPGA solutions can be a challenge and as a consultant, I often see designs which are facing difficulties late in the...

We will be releasing a new open source development board in a few weeks and will eventually be offering a free training course for it,...

Readers of this blog will know I am a big supporter of system on modules (SoM). From the MicroZed to the UltraZed, Snickerdoodle and of...

Over the last five years, I have been writing some very in-depth projects on Hackster in addition to my weekly blogs. These projects have...

We all know that if we want to get the best performance, we should place input clocks to our FPGAs on clock capable or dedicated clock...

Over the years I have talked a lot about how to use FPGAs and SoCs and I’ve even shared tips and advice for how to start your own...

There are a range of boutique companies developing FPGAs aimed at addressing low to medium-density devices. Cologne Chip is a German...

Last week we looked at how we could use 7 series clocking resources to provide integer clock division without using MMCM. In this week’s...

Over the years, we have looked at many different verification frameworks like cocotb and varying approaches when working with AMD AXI...

In addition to questions about the best beginner development boards, I am often asked which books I recommend for FPGA developers just...