MicroZed Chronicles: ChipScoPy
When it comes to debugging designs the more visibility and control we have over debugging elements such as ILAs is critical. When we...
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Adam Taylor
Apr 163 min read
MicroZed Chronicles: Alinx VD100
One of the nice things about writing this blog is that I get to take a look at many new FPGA and SoC boards. A few weeks ago, I received...
Adam Taylor
Mar 204 min read
MicroZed Chronicles: TE0950, DDRMC and NoC
One of the pivotal architectural enhancements in the Versal family of devices was the introduction of the Network on Chip. Within the...
Adam Taylor
Jan 174 min read
MicroZed Chronicles: Creating a Versal AI Edge Design
A couple of weeks ago we looked at the Trenz TE0950 development board which contains a Versal AI Edge XCVE2302 device in ES1. This means...
Adam Taylor
Jan 33 min read
MicroZed Chronicles: Versal AI Edge and TE0950
In the 2024 MicroZed Chronicles, we are going to examine Versal in depth with a particular focus on the AI Edge series. We’ve looked at...
Adam Taylor
Jul 18, 20233 min read
MicroZed Chronicles: Versal Clocking Resources
Over the last few weeks, we have looked at some interesting aspects of the 7 series and UltraScale / UltraScale+ clocking buffers. To...
Adam Taylor
Apr 19, 20233 min read
MicroZed Chronicles: A look at the DSP58
We looked at fixed point math a few weeks ago and we’ve also previously looked at how we can use DSP48 in both 7 series and UltraScale+...
Adam Taylor
Feb 9, 20223 min read
MicroZed Chronicles: Versal Address Map and DDR Memory Controller
In order to effectively architect solutions in Versal devices, we first need to understand how each of the elements within the device can...
Adam Taylor
Jan 19, 20223 min read
MicroZed Chronicles: Versal Part Two – Device Architecture
In the first instalment of this Versal miniseries, I briefly introduced the architecture of the Versal devices before showing a simple...
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