We looked at fixed point math a few weeks ago and we’ve also previously looked at how we can use DSP48 in both 7 series and UltraScale+...

One of the questions I get asked a lot is which development board is the best for (beginner) FPGA and SOC development. Understandably,...

We looked recently at the UltraScale+ IO resources which provide a range of capabilities that can be very effective in addressing both...

One of my passions is sharing information about how we can develop better, more effective FPGA designs. This passion is the driving force...

A few months ago, we looked at the AXI Stream FIFO. The AXI Steaming FIFO allows developers to be able to access AXI Streams from AXI...

When I’ve previously created image processing blogs or applications, I have tended to use the Video Direct Memory Access (VDMA) module to...

Over the last few weeks, I have been creating a course centered around the Avnet ZUBoard which will be like the MiniZed and Ultra96-V2...

One of the great things about the BRAM in Xilinx FPGAs is its ability to implement error correcting codes (ECC) on the data stored...

Writing good, portable, reusable HDL code, that enables the synthesized design to implement at the desired frequency can definitely be a...

One of the critical techniques in an embedded system that enables responsive software is using interrupts. In this series, we have used...

I am very interested in higher levels of abstraction for developing FPGAs and especially algorithms like image processing and control....

Over the last week I noticed a few questions on r/FPGA and from a client on metastability and synchronizing signals coming into the...

Over the last few months, we have explored how to migrate from Spartan-6 FPGAs to 7 series and beyond in order to help developers with...

I am a regular reader of many FPGA notice boards. A few days ago, I saw a question about how the DSP48E2 could be used as a multiplexer....

We looked at the AXI Virtual FIFO Controller in a blog a couple weeks ago and created an example design running on the Arty S7-50 while...

I’m a big fan of the Raspberry Pi Pico with the RP2040 microcontroller and have used it several times to emulate system interfaces on my...

FIFOs are versatile tools to use within our designs because they enable us to buffer data when doing signal and image processing. We also...

A couple of week ago, I held several webinars on how to convert Spartan-6 designs into 7 series devices. There were several interesting...

Getting the most efficient utilization of our FPGA does not mean that we need to have the logic resources dedicated to all use cases. We...

Last week we looked at IDELAY2 and ODELAY2 in 7 series IO, the selectIO which is included in 7 Series, UltraScale and UltraScale+...