The foundation of all AMD FPGA and SoC designs is Vivado ML Edition software.

Vivado enables us to create and implement designs for our FPGA and SoC, along with creating platforms which can be built upon using accelerated flows for SoC applications.

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Topics covered in this tutorial: 

This introductory session to Vivado will teach developers how to work effectively and confidently, covering topics such as:

• Vivado overview – its role in the development process and where it fits with AMD FPGA toolchains

• Project creation modes - GUI, command line (Project and Non-Project flow)

• Working with IP Integrator

• Creating and working with custom IP

• Synthesis and implementation flow - including design checkpoints and out-of-context synthesis

• Timing analysis - how do we find and correct issues in the implementation

• Design assessment and risk reduction using design analysis report and quality of result suggestions

• Clock Domain Crossing

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Workshop Materials:

Download the lab book and slides here. 

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