Throughout the MicroZed Chronicles, we have mostly focused on how to create designs using Xilinx FPGAs, Zynq-7000 SoCs, Zynq MPSoCs and Zynq RFSoCs, etc. (and let us not forget the design tools). However, it’s sometimes fun to see a finished application or product in more detail, so that is what we'll be looking at in this blog post.
A few weeks ago, it was pointed out to me that the Tektronix TBS1052C is based around a single-core Zynq-7000 device. This single-core SoC is responsible for everything from sampling the ADCs to controlling the front panel and driving the display.
I needed an entry-level scope for a project I am working on so I decided I would pick up a Tektronix TBS1052C and take look at what is inside.
Once the scope arrived, I took the back off and examined the circuit boards inside.
The most obvious element is the Zynq-7000 SoC which has a large heat sink on the top.
Around the device, you can see the additional components which support the Zynq-7000 in its objective. The main components appear to be:
Analog signal conditioning using custom Tektronix ASIC marked TEC
ADC convertor (TI ADC08D1020) – A dual 1 GSPS ADC connected to the Zynq PL using LVDS
DDR memory – Two DDR memory devices appear to be fitted, providing 1GB of memory. These devices are the IS43TR16256BL-125KBL.
eMMC memory - Single Micron eMMC device for the configuration and operating system.
USB transceiver – T1201B provided for the front and rear USB port.
It is interesting to see the mixed-signal design practices which have been followed in the design of the analog front inputs with the segmentation behind screens. The front panel and display are also effectively screened from the sensitive analog front end. This also prohibits high-frequency video signal emissions from impacting the sensitive analog inputs.
It’s not evident due to the heat sink on top, but the Zynq-7000 SoC is a single-core device.
When I asked Tektronix why a single-core Zynq was used, I was told it was because the dual-core devices didn’t provide a significant increase in performance. Another reason for the selection was increased system reliability. The use of a single core enables a 50˚C ambient temperature to be achieved, removing the need for a fan which is always a reliability weakness.
At a system level, the Zynq-7000S is at the center of the device and responsible for running the entire scope operation under the control of the Arm processor.
The programmable logic on the Zynq device is perfect for receiving the LVDS data from the ADC because the IO bank on the FPGA provides for on-chip termination, reduces the board complexity.
As I understand the architecture of the internal Zynq functions, the programmable logic’s main role is to capture the digitized data. The programmable logic further processes the signal by implementing decimation, scaling and calibration. It is also used to implement licensable bandwidths as the product line scales input bandwidths from 50MHz to 200MHz. Once the digitized data has been captured and processed, it is moved from acquisition memory (20K points per channel) into the processor DDR memory.
For those unfamiliar with the single-core Zynq range, it is worth remembering the logic resources available within single-core Zynq devices offer very constrained logic resources between 23K (7007S) and 65K (7014S) logic cells. I did ask Tektronix about the utilization of the Zynq device and was told it was “pretty full”, which doesn’t surprise me.
Moving the data into the processor DDR enables the processor to access the quantized data and run post processing, data triggering, and measurement functions. The processor is also responsible for driving the display and running user interface and control. This control can be via the front panel or over the USB A connector on the rear of the scope.
All told, it is impressive what functionality can be implemented in a single-chip Zynq device.
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