Last week, we examined the new MicroBlaze V, which is based on the popular RISC-V RV32I Instruction Set Architecture. This enabled me to walk through the stages of development required to create a MicroBlaze V system. Of course, that system can be configured and optimized in a number of ways. In this blog, we are going to look at how we can achieve the smallest footprint MicroBlaze V implementation using the MicroBlaze V MCS IP.
If you are not familiar with this IP block, it implements a MicroBlaze V processor and several peripherals very tightly coupled. This tight integration enables further optimization than can be achieved using a MicroBlaze V and discrete components.
The MicroBlaze V MCS does, however, have differences compared to a MicroBlaze V implementation. While the MicroBlaze V has a range of different configurations and peripherals and can run from either BRAM or External Memory, the MicroBlaze V MCS is only capable of executing its applications from BRAM and has a limited number of fixed peripherals.
On the MicroBlaze V MCS, the peripherals include:
UART – With separate TX, RX enables and selectable baud rate and parity
FIT – Four Fixed Interval Timers, capable of generating interrupts or a 50:50 waveform
PIT – Four Programmable Interrupt Timers; pre-scalers are provided, and the PIT generates an interrupt and outputs a 50:50 waveform
GPO – Four 32-bit general-purpose outputs
GPI – Four 32-bit general-purpose inputs
Interrupt – External Interrupt signal
When it comes to configuring the MicroBlaze V MCS processor itself, there are a range of options from memory size and ECC protection to the MicroBlaze V optimization (Area, Performance [RV32I/RV32IM]).
If we want to debug the MicroBlaze V MCS, we can enable debug support.
There is also support for a MicroBlaze V Trace Bus and an external IO bus which provides a simple parallel 32-bit IO bus.
The external IO bus provides the ability to read and write information from the larger system. I will create a future blog which looks at its use in a design.
To demonstrate the MicroBlaze V MCS, I created a project targeting the Leonidas board as it contains the smallest Spartan 7 device available (XC7S6).
Getting started is straightforward. I created the project which targeted the Leonidas board and added the MicroBlaze V MCS into the block diagram.
The rest of the design is straightforward with the addition of a clock wizard and configuration of the MicroBlaze V MCS processor as we desire.
In this case, we are going to be configuring the MicroBlaze V MCS to provide a UART Tx and four GPIOs connected to the LEDs on the board.
When it comes to the processor memory size, we are going to be using 16KB of memory, along with optimizing for Area.
The final design looks as below; we can build the bitstream and export the XSA.
When it comes to logic utilization, the MicroBlaze MCS is very compact, taking only 1400 LUTs and 1046 FFs.
With the XSA built, we are able to create a new project using the Vitis Unified environment. The first step is to create the Platform, which will show the MicroBlaze V MCS as the target processor, followed by creating a new application.
To be able to drive and work with the IO provided by the MicroBlaze V MCS IO modules, we use the API xiomodule.h, which is provided by the Board Support Package generated when the platform is created.
Using this API, we are able to work with the PIT, FIT, GPO, and GPI by leveraging the provided functions. In this simple example, I used the discrete set and clear functions to set and clear the LEDs on the FPGA to flash them after outputting a message on the serial port.
Running this on the Leonidas board shows the LEDs toggling as we would expect. The MicroBlaze V MCS is ideal for applications where we want to implement a small microcontroller for interfacing or simple configuration, saving us from using a complex and unsupportable FSM.
Workshops and Webinars
If you enjoyed the blog why not take a look at the free webinars, workshops and training courses we have created over the years. Highlights include
Professional PYNQ Learn how to use PYNQ in your developments
Introduction to Vivado learn how to use AMD Vivado
Ultra96, MiniZed & ZU1 three day course looking at HW, SW and PetaLinux
Arty Z7-20 Class looking at HW, SW and PetaLinux
Mastering MicroBlaze learn how to create MicroBlaze solutions
HLS Hero Workshop learn how to create High Level Synthesis based solutions
Perfecting Petalinux learn how to create and work with PetaLinux OS
Embedded System Book
Do you want to know more about designing embedded systems from scratch? Check out our book on creating embedded systems. This book will walk you through all the stages of requirements, architecture, component selection, schematics, layout, and FPGA / software design. We designed and manufactured the board at the heart of the book! The schematics and layout are available in Altium here Learn more about the board (see previous blogs on Bring up, DDR validation, USB, Sensors) and view the schematics here.
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